# Wavefoundry

*/Startups/Wavefoundry*

## Startup Overview

This electronic design automation platform routes photonic integrated circuits using standard optical logic gates. It translates high-level digital logic directly into physical photonic layouts. Hardware engineers input their circuit parameters, and the engine automatically generates the complex waveguide geometries required for silicon photonics manufacturing.

Hardware teams designing optical chips face severe bottlenecks when mapping logical designs to physical space. Standard workflows force engineers to rely on manual KLayout routing, where they must draw individual waveguides by hand and rigidly adapt their entire architecture to the physical constraints of a single fabrication facility.

While legacy simulators like Ansys Lumerical or Luceda Photonics lock designs into specific fabricator Process Design Kits, this platform is fully automated and entirely foundry-agnostic. By executing routing through universal optical logic gates, it completely removes manual layout steps and enables engineering teams to port their photonic designs across different manufacturing partners without altering the base logic.

## Startup Founding Hypothesis

**Approach**: that routes photonic circuits using standard optical logic gates
**Competitors**:
- [Ansys Lumerical](/Competitors/Ansys_Lumerical)
- [Luceda Photonics](/Competitors/Luceda_Photonics)
- [manual KLayout routing](/Competitors/manual_KLayout_routing)
**Differentiator2x2**: fully automated and foundry-agnostic rather than locked to specific fabricators

## Startup Solution Coordinate

**Solution**: [Wavefoundry Logic Router](/Software/Wavefoundry_Logic_Router)

## Startup Position2x2

```mermaid
quadrantChart
x-axis Manual Routing --> Fully Automated
y-axis Foundry-Locked --> Foundry-Agnostic
quadrant-1 Universal Automation
quadrant-2 Manual Agnostic
quadrant-3 Manual Locked
quadrant-4 PDK Locked Automation
Wavefoundry: [0.85, 0.85]
Ansys Lumerical: [0.75, 0.35]
Luceda Photonics: [0.65, 0.25]
manual KLayout routing: [0.15, 0.90]
```

## Startup Offer

**Proof**:
- Targeting a 90% reduction in manual KLayout routing time for standard silicon photonics designs.
- Aiming to deliver zero-DRC-error layouts for the top merchant silicon photonics foundries.
- Designed to achieve routing insertion losses comparable to expert manual optimization.
**Tiers**:
- Name: Single Tapeout · Price: ~$400–$800/mo · Inclusions: One active design project, automated routing for standard optical logic gates, and export to one standard foundry PDK.
- Name: Commercial Team · Price: ~$2,000–$4,500/mo · Inclusions: Unlimited active projects, custom DRC constraints, multi-foundry agnostic exports, and up to 5 team seats.
- Name: Enterprise Deployment · Price: ~$30k–$50k/yr · Inclusions: Unlimited seats, proprietary custom PDK ingestion, priority compute queuing, and dedicated technical support.
**Guarantee**: Guarantees the generation of DRC-clean photonic layouts compatible with your selected standard foundry rules, or your account is credited for the compute time used on that routing run.
**Business Function**: ProvideService
**Objection Handlers**:
- Objection: Automated routing creates too much waveguide crossing loss. Rebuttal: Wavefoundry mathematically optimizes standard optical logic gate placement to strictly minimize crossings and bend losses.
- Objection: We use a highly proprietary, non-standard PDK. Rebuttal: The platform is designed to dynamically ingest custom design rule constraints without requiring hardcoded software updates.
- Objection: We already use Ansys Lumerical or Luceda. Rebuttal: Wavefoundry replaces the manual KLayout routing step, seamlessly exporting DRC-clean layouts ready for simulation in your existing tools.
**Pricing Architecture**: Tiered
**Agent Checkout Support**:
- agentic-commerce-protocol

## Startup Brand

**Voice**: Precise and technical, characterized by absolute hardware specification clarity.
**Tagline**: Automated photonic circuit routing for any foundry.
**Icon Concept**: prism
**Palette Intent**: electric-signal
**Visual Identity**: The brand pairs deep silicon-wafer charcoal with sharp laser-magenta accents, using monospace typography to evoke optical logic schematics.
**Archetype Reference**: the-creator

## Startup Buyer Chain

**Chain**: Wavefoundry → Photonic Integrated Circuit (PIC) Designer → Optical Hardware Manufacturer
**Gtm Motion**: Bottom-up adoption by individual PIC designers using the tool for rapid concept routing, expanding to enterprise team licenses when engineering teams need to export complex, foundry-agnostic layouts for multi-project wafer (MPW) tape-outs.
**Agent Channel**: Designed to list in EDA copilot tool registries and OpenAPI integration catalogs, allowing AI hardware-design assistants to directly call the Wavefoundry routing API when translating high-level logic into physical photonic layouts.
**Primary Channel**: Discovery via PyPI and photonics engineering repositories where PIC designers actively search for Python-based routing scripts or KLayout automation macros.

## Startup Customer Journey

```mermaid
flowchart LR; A[Photonics Repository] --> B[PIC Designer]; B --> C[Automated Routing API]; C --> D[Single Tapeout License]; D --> E[Engineering Team]; E --> F[Commercial Team License]; F --> G[EDA Copilot Registry];
```

## Startup Proof Points

_Illustrative — target and order-of-magnitude estimate figures, not an achieved track record (this Thing is concept-stage)._

**Pilot Goals**:
- 4-week single-project pilot: Ingest one standard foundry PDK and route a standard optical logic gate circuit; target result is generating a completely DRC-clean export on the first attempt
- 8-week team-deployment pilot: Deploy the platform to up to 5 designers running parallel projects; target result is a measured 80 percent reduction in total layout generation time compared to their previous manual workflow
**Target Metrics**:
- Target: 90 percent reduction in manual KLayout routing hours per standard silicon photonics design
- Aim: 0 DRC violations on the initial automated layout submission to top merchant foundries
- Target: 100 percent compatibility with existing simulation tools like Ansys Lumerical and Luceda via standard export formats
- Aim: Less than 0.1dB excess insertion loss per automated waveguide bend compared to expert manual optimization
**Target Case Studies**:
- Fabless silicon photonics startup: Target transformation is reducing the layout time for their optical transceivers from weeks of manual KLayout routing to hours of automated generation
- Enterprise telecom hardware vendor: Target transformation is standardizing the layout process across multiple proprietary PDKs using dynamic constraint ingestion without requiring hardcoded software updates
- University R&D photonics lab: Target transformation is eliminating DRC-error rejection cycles with standard merchant foundries, allowing researchers to focus on device physics rather than manual layout tweaking
**Testimonial Targets**:
- Senior Photonic Designer: Relief that the automated routing strictly minimizes waveguide crossings and bend losses without requiring weeks of manual KLayout adjustments
- VP of Hardware Engineering: Confidence in the predictability of tapeout schedules because the automated DRC-clean layout generation removes back-and-forth iteration with the foundry
- CAD Tool Manager: Satisfaction with how seamlessly the platform ingests custom design rule constraints and exports directly to their established simulation workflows

## Startup Top Risks

**Risks**:
- Severity: existential · Description: Major semiconductor foundries refuse to share their proprietary optical Process Design Kits (PDKs), preventing the platform from achieving true foundry-agnostic routing. · Mitigation Status: unmitigated
- Severity: high · Description: Automated routing algorithms fail to adequately model optical cross-talk and phase errors at scale, resulting in physically unmanufacturable or lossy circuits. · Mitigation Status: in-progress
- Severity: moderate · Description: Hardware engineers reject fully automated layouts in favor of manual KLayout tuning because they require pixel-perfect control to meet stringent optical loss targets. · Mitigation Status: in-progress
- Severity: moderate · Description: Incumbents like Ansys Lumerical integrate automated optical logic routing into their existing industry-standard suites, leveraging established enterprise contracts to block adoption. · Mitigation Status: unmitigated

## Startup Competitors

- [Ansys Lumerical](/Competitors/Ansys_Lumerical) — Incumbent Simulation
- [Luceda Photonics](/Competitors/Luceda_Photonics) — Foundry-Locked Incumbent
- [Manual KLayout Routing](/Competitors/Manual_KLayout_Routing) — Status Quo
- [Synopsys OptoDesigner](/Competitors/Synopsys_OptoDesigner) — Incumbent
- [Cadence CurvyCore](/Competitors/Cadence_CurvyCore) — Incumbent

## Startup Solution Stack

- [Photonic Routing Service](/Services/Photonic_Routing_Service) — Service-as-Software
- [Optical Gate Agent](/Agents/Optical_Gate_Agent) — Agent
- [Foundry Translation Worker](/Agents/Foundry_Translation_Worker) — Agent
- [Circuit Geometry API](/Software/Circuit_Geometry_API) — Software
- [Photonic Simulation Engine](/Software/Photonic_Simulation_Engine) — Software

## Startup Story Brand

**Hero**:
- **Need**: to spend cycles on optical architecture innovation instead of manual waveguide geometry
- **Want**: to automate photonic circuit routing using standard optical logic gates
- **Identity**: the photonics engineer at a high-bandwidth optical networking startup
**Plan**:
- Step: Define · Detail: Input your optical logic schematics and select your target foundry PDK.
- Step: Approve · Detail: Review the automatically routed paths and verify the optimized crossing-loss metrics.
- Step: Export · Detail: Download the DRC-clean GDSII file ready for tapeout or Lumerical simulation.
**Guide**:
- **Empathy**: You shouldn't still be wrestling with manual waveguide crossings. Ansys Lumerical wasn't built to automate the physical routing of complex logic gates.
**Problem**:
- **Villain**: manual KLayout routing
- **External**: Layout engineers spend weeks hand-drawing waveguide paths in KLayout to avoid DRC errors across foundry PDKs.
- **Internal**: You feel like a technical draftsman rather than a chip architect.
- **Philosophical**: Every engineer deserves a deterministic path to silicon — not a month of pixel-pushing.
**Success**: Wavefoundry produces tapeout-ready photonic layouts in minutes with insertion losses comparable to expert manual tuning.
**One Liner**: What if you could route a complex photonic chip in minutes? Wavefoundry automates optical logic gate routing, delivering DRC-clean layouts for any foundry.
**Positioning**:
- **So That**: generate DRC-clean photonic layouts in minutes instead of weeks
- **Unlike**: manual KLayout routing
- **For Whom**: photonics engineers at optical networking startups
- **Category**: Automated Photonic IC Routing Software
**Call To Action**:
- **Direct**: Route a Tapeout
- **Transitional**: View Sample DRC-Clean Layouts
**Failure Stakes**:
- Missing critical tapeout deadlines
- Excessive signal loss from unoptimized bends
- Wasted months on manual GDSII revisions
**Transformation**:
- **To**: architecting optical logic systems instead of drawing waveguides
- **From**: a layout specialist stuck in manual KLayout workarounds
**Controlling Idea**: Photonic layout should be an automated compilation, not a manual drawing process.

## Startup Token Hero

**Genre**: founding-hypothesis
**Rendered**: What if you could route a complex photonic chip in minutes? Wavefoundry automates optical logic gate routing, delivering DRC-clean layouts for any foundry.
**Mechanism**: spine-derived-v1
**Template Id**: spine-founding-hypothesis
**Vocab Fingerprint**: f5b78a494df29644

## Startup Token Positioning

**Genre**: moore-positioning
**Rendered**: Automated Photonic IC Routing Software for photonics engineers at optical networking startups. Unlike manual KLayout routing — generate DRC-clean photonic layouts in minutes instead of weeks.
**Mechanism**: spine-derived-v1
**Template Id**: spine-moore-positioning
**Vocab Fingerprint**: 038d424be9424f8b

## Startup Token Pitch Deck

**Genre**: pitch-deck
**Rendered**: Problem: Layout engineers spend weeks hand-drawing waveguide paths in KLayout to avoid DRC errors across foundry PDKs.
Solution: What if you could route a complex photonic chip in minutes? Wavefoundry automates optical logic gate routing, delivering DRC-clean layouts for any foundry.
Customer: photonics engineers at optical networking startups
Unlike: manual KLayout routing
**Mechanism**: spine-derived-v1
**Template Id**: spine-pitch-deck
**Vocab Fingerprint**: e4d83dc41e2e9eb1

## Startup Token M E D D P I C C

**Pain**: Layout engineers spend weeks hand-drawing waveguide paths in KLayout to avoid DRC errors across foundry PDKs.
**Metrics**: Target: Wavefoundry produces tapeout-ready photonic layouts in minutes with insertion losses comparable to expert manual tuning.
**Rendered**: Pain: Layout engineers spend weeks hand-drawing waveguide paths in KLayout to avoid DRC errors across foundry PDKs.
Economic buyer: Photonic Integrated Circuit Designer
Metrics: Target: Wavefoundry produces tapeout-ready photonic layouts in minutes with insertion losses comparable to expert manual tuning.
Competition: manual KLayout routing
**Mechanism**: spine-derived-v1
**Competition**: manual KLayout routing
**Economic Buyer**: Photonic Integrated Circuit Designer
**Vocab Fingerprint**: 8f5ce96cb92bf0d5

## Startup Token Cold Email

**Genre**: cold-email
**Rendered**: Subject: Automated Photonic IC Routing Software for photonics engineers at optical networking startups

photonics engineers at optical networking startups — Layout engineers spend weeks hand-drawing waveguide paths in KLayout to avoid DRC errors across foundry PDKs. What if you could route a complex photonic chip in minutes? Wavefoundry automates optical logic gate routing, delivering DRC-clean layouts for any foundry.
**Mechanism**: spine-derived-v1
**Template Id**: spine-cold-email
**Vocab Fingerprint**: ed670cae73b4540a

## Startup Token Agent Spec

**Genre**: ai-agent-spec
**Rendered**: Automated Photonic IC Routing Software. What if you could route a complex photonic chip in minutes? Wavefoundry automates optical logic gate routing, delivering DRC-clean layouts for any foundry. Serves photonics engineers at optical networking startups.
**Mechanism**: spine-derived-v1
**Template Id**: spine-ai-agent-spec
**Vocab Fingerprint**: 2d36ffcaadfb8942

## Neighborhood

### Candidate solutions

- [Bulk Logistics Orchestration](/Problems/Bulk_Logistics_Orchestration) — candidate solution for · Problems
- [Analog Screening Quality Control](/Problems/Analog_Screening_Quality_Control) — candidate solution for · Problems

### Composed of

- [Photonic Routing Service](/Services/Photonic_Routing_Service) — composes · Services
- [Photonic Simulation Engine](/Software/Photonic_Simulation_Engine) — composes · Software
- [Circuit Geometry API](/Software/Circuit_Geometry_API) — composes · Software
- [Foundry Translation Worker](/Agents/Foundry_Translation_Worker) — composes · Agents
- [Optical Gate Agent](/Agents/Optical_Gate_Agent) — composes · Agents

### What it offers

- [Wavefoundry Logic Router](/Software/Wavefoundry_Logic_Router) — offers · Software

### Embodies

- [Software](/Theses/Software) — embodies · Theses

### Competitors

- [Luceda Photonics](/Competitors/Luceda_Photonics) — competes with · Competitors
- [Cadence CurvyCore](/Competitors/Cadence_CurvyCore) — competes with · Competitors
- [Synopsys OptoDesigner](/Competitors/Synopsys_OptoDesigner) — competes with · Competitors
- [Manual KLayout Routing](/Competitors/Manual_KLayout_Routing) — competes with · Competitors
- [Ansys Lumerical](/Competitors/Ansys_Lumerical) — competes with · Competitors

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